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Systolic-Array Architecture for Steerable Multi-Beam VHF Wave-Digital RF Apertures

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A 2-D massively-parallel, high throughput, systolic array for a spatio-temporal wave-digital filter architecture is proposed. RF receive mode aperture beam personalities are achieved using 2-D fan filters with dynamically steerable passband directions and fan angles. The wave-digital realization results in low sensitivity of the far-field beam to errors in filter coefficients due to fixed-point effects in the digital arithmetic hardware. A fixed-point design of the systolic array architecture that eliminates overflow errors is described. The architecture is implemented in FPGAprototype form and tested using MATLAB simulink with Xilinx EDA tools. The verified digital design is ported to CMOS standard cell technology to obtain the area and power costs as well as the operational frequency. The 45 nm CMOS synthesis, placement and routing show overflow free maximum frequency of operation of 131.02 MHz for 
1-passband fan filter and an estimated power consumption of 450.30 mW at supply voltage 1.1 V DC indicating potential applications in the VHF range.

Nilanka Rajapaksha,

Field of Interest

“The field of interest shall be the organization, systems engineering, design, development, integration, and operation of complex systems for space, air, ocean, or ground environments. These systems include but are not limited to navigation, avionics, mobile electric power and electronics, radar, sonar, telemetry, military, law-enforcement, automatic test, simulators, and command and control."


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